Open RF Prototyping

RF Blocks and Redpitaya

Reference designs making use of Red Pitaya SDRlab or STEMlab devices.

A Dual ADC/DAC Using the Red Pitaya Board

  • 16-bit ADC and 14-bit DAC at 122.88/125 MHz sampling rates

  • 32 dB step attenuator extends ADC input range

  • Zynq programmable logic design for sample acquisition

  • ADC samples available via no copy DMA Linux device

  • SPI and GPIO available as Linux devices
A Spectrum Analyzer Testbed App

  • Uses the FPGA PL design as presented in 'A Dual ADC Using the Red Pitaya Board'
DMA on the Red Pitaya/Zynq

  • Uses the Xilinx AXI DMA core

  • Zero copy kernel driver

  • User space library with associated Python module

  • Synchronous and asynchronous data transfers
Linux VM for Zynq FPGA/Red Pitaya Development

  • Configuring an Incus managed VM for Xilinx Vivado FPGA development

UIO on the Red Pitaya/Zynq

  • User space memory mapped access to configuration and status registers

Using Linux SPI on the Red Pitaya Board

  • User space access to the Red Pitaya board SPI device.
Using GPIO on the Red Pitaya Board

  • User space access to the Red Pitaya board GPIO pins.